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  for further information contact your local stmicroelectronics sales office. january 2014 docid025732 rev 2 1/17 sta8089fg fully integrated gps/galileo/glonass/beidou/qzss receiver with embedded rf and in-package flash data brief features ? stmicroelectronics ? positioning receiver with 48 tracking channels and 2 fast acquisition channels supporting gps, galileo, glonass, beidou and qzss systems ? pin to pin compatible with sta8088fg ? single die standalone receiver embedding rf front-end and low noise amplifier ? -162 dbm indoor sensitivity (tracking mode) ? fast ttff < 1 s in hot start and 30 s in cold start ? high performance arm946 mcu (up to 196 mhz) ? 256 kbyte embedded sram ? in-package sqi flash memory (16 mbits) ? real time clock (rtc) circuit ? 32-bit watch-dog timer ? 3 uarts ? 1 i 2 c master/slave interface ? 1 synchronous serial port (ssp, motorola-spi supported) ? usb2.0 full speed (12 mhz) with integrated physical layer transceiver ? 2 controller area network (can) ? 2 channels adc (10 bits) ? operating condition: ? main voltage regulator (v inl ): 1.8 v 5% ? backup voltage (v inb ): 1.6 v to 4.3 v ? digital voltage (v dd ): 1.2 v 10% ? rf core voltage (v cc ): 1.2 v 10% ? io ring voltage (v ddio ): 1.8 v 5% or 3.3 v 10% ? package: ? vfqfpn56 (7 x 7 x 0.85 mm) 0.4 mm pitch ? ambient temperature range: -40/+85c description sta8089fg is a single die standalone positioning receiver ic working on multiple constellations (gps/galileo/glonass/beidou/qzss). the device is backward compatible with sta8088fg, this enables fast customer application migration. the device is offered with a complete gnss firmware which performs all gnss operations including tracking, acquisition, navigation and data output with no need of external memories. vfqfpn56 (7x7x0.85mm) www.st.com
contents sta8089fg 2/17 docid025732 rev 2 contents 1 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 vfqfpn56 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 power supply pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.4 main function pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.5 test/emulated dedicated pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.6 communication interface pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.7 general purpose pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.8 rf front-end pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3 package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.1 ecopack ? packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.2 vfqfpn56 7 x 7 x 0.85 mm package information . . . . . . . . . . . . . . . . . . 13 4 ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
docid025732 rev 2 3/17 sta8089fg list of tables 3 list of tables table 1. power supply pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 2. main function pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 3. test/emulated dedicated pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 4. communication interface pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 5. general purpose pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 6. rf front-end pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 7. vfqfpn56 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 table 8. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
list of figures sta8089fg 4/17 docid025732 rev 2 list of figures figure 1. sta8089fg system block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 2. vfqfpn56 connection diagram (with can). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 3. vfqfpn56 connection diagram (no can) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 4. vfqfpn56 7 x 7 x 0.85 mm package dimension. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 5. ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
docid025732 rev 2 5/17 sta8089fg overview 16 1 overview sta8089fg is a highly integrated single-chip standalone gnss receiver designed for positioning system applications. sta8089fg embeds the new st gnss positioning engine capable of receiving signals from multiple satellite navigation systems, including the us gps, european galileo, russia's glonass, chinese beidou and japan's qzss. the sta8089fg ability of tracking simultaneously the signals from multiple satellites regardless of their constellation, make this chip capable of delivering exceptional accuracy in urban canyons and in the environments where buildings and other obstructions make satellite visibility challenging. the sta8089fg is backward compatible with sta8088fg, enabling fast customer application migration. the sta8089fg combines a high performance arm946 microprocessor with i/o cpabilities and enhanced peripherals. it supports usb2.0 standard at full speed (12 mbps) with on-chip phy. the device is offered with a complete firmware performing all positioning operations including acquisition, tracking, navigation and data output with no need of external memories. the device powered with 1.8v enables the on-chip voltage regulators to internally supply the rf front-end, core logic and the backup logic. the device can be directly powered with 1.2 v bypassing the embedded voltage regulators which will be put in power down mode. i/o lines are compatible with 1.8 v and 3.3 v. the sta8089fg, using stmicroelectronics cmosrf technology, is housed in a vfqfpn-56 (7 x 7 x 0.85 mm) package with stacked 16 mbit flash memory.
pin description sta8089fg 6/17 docid025732 rev 2 2 pin description 2.1 block diagram figure 1. sta8089fg system block diagram $+% ,& 078 *3,2 :' %.b'rpdlq 26&, ,62 &(// $3% %ulgjh 35&& 57& %.5$0.% *%%&ruuhodwru (qjlqh *&,) **,) )dvw$ft &kdqqho 7un &kdqqhov 0x[ $ft 5$0v $3% %ulgjh &/2&.b*(1 7hvw frqwuroohu -7$* ,2v 9,& $50 ,&dfkh .% '&dfkh .% +,*+63((',7&0 .% +,*+63((''7&0 .% ,'6:,7&+$%/( [.% $3% *5),3 63,,) 5) 6hfwlrq /1$ 6hfwlrq $'& ** $'& *& 26&, 3// 5lqj 26&, 308 /'2 /'2 %./'2 %dqgjds%ldv2vfloodwru/9'v $'& 8$57 5[7[ 8$57 5[7[ 663 8$57 5[7[ $3% %ulgjh &$1 $3% %ulgjh &$1 ()7 )/$6+ 0e 86% ,) 64, ,) ("1($'5
docid025732 rev 2 7/17 sta8089fg pin description 16 2.2 vfqfpn56 pin configuration figure 2. vfqfpn56 connection diagram (with can)                                                         $"/@59 5.4 5345 /$ 51@*'@1 51@*'@/ /$ 7$$@3' -/"@*/ (/%@-/" /$ 70- 7*/- /$ /$ 35$@950 35$@95* 8",&61 345o 45%#:o 45%#:@065 7%%% 70# 95"-@065 95"-@*/ 7$$@1-- /$ 7$$@$)"*/ ("1($'5 41*@%* 41*@$-, 41*@$4/ 6"35@59 6"35@39 6"35@59 6"35@39 (1*0 7%%@42* "%$@*/ "%$@*/ 7*/- 70- 7*/# 5$, 41*@%0 7%%*0@3 /$ /$ 7%%% 64#@%1 64#@%. 5%0 $"/@59 7%%*0@3 5%* $"/@39 $"/@39
pin description sta8089fg 8/17 docid025732 rev 2 figure 3. vfqfpn56 connection diagram (no can) 2.3 power supply pins                                                         *$@$-, 5.4 5345 /$ 51@*'@1 51@*'@/ /$ 7$$@3' -/"@*/ (/%@-/" /$ 70- 7*/- /$ /$ 35$@950 35$@95* 8",&61 345o 45%#:o 45%#:@065 7%%% 70# 95"-@065 95"-@*/ 7$$@1-- /$ 7$$@$)"*/ ("1($'5 41*@%* 41*@$-, 41*@$4/ 6"35@59 6"35@39 6"35@59 6"35@39 (1*0 7%%@42* "%$@*/ "%$@*/ 7*/- 70- 7*/# 5$, 41*@%0 7%%*0@3 /$ /$ 7%%% 64#@%1 64#@%. 5%0 6"35@59 7%%*0@3 5%* 6"35@39 *4$@4% table 1. power supply pins symbol i/o voltage i/o alternative function description sta8089fg vcc_chain 1.2 v pwr default analog supply voltage for rf chain (1.2 v) 16 vcc_pll 1.2 v pwr default analog supply voltage for pll rf (1.2 v) 18 vcc_rf 1.2 v pwr default analog supply voltage for rf (1.2 v) 8 vdd_sqi 1.8 v pwr default digital supply voltage for sqi 34 vddd 1.2 v pwr default digital supply voltage 22,47 vddio_r1 1.8 v or 3.3 v pwr default digital supply voltage for i/o ring 1 (1.8 v or 3.3 v) 44
docid025732 rev 2 9/17 sta8089fg pin description 16 2.4 main function pins vddio_r2 3.3 v pwr default digital supply voltage for i/o ring 2 (3.3 v) 52 vinb 1.6 v - 4.3 v pwr default backup ldo input supply voltage (1.6 v to 4.3 v) 29 vinl1 1.8 v pwr default ldo1 input supply voltage (1.6 v to 4.3 v) 31 vinl2 1.8 v pwr default ldo2 input supply voltage (1.6 v to 4.3 v) 13 vob 1.0 v pwr default ldo backup output voltage (1.0 v) 21 vol1 1.2 v pwr default ldo1 output voltage: 1.2 v or 1.8 v 30 vol2 1.2 v pwr default ldo2 output voltage (1.2 v) 12 gnd gnd gnd default ground ep gnd_lna gnd gnd default ground 10 table 1. power supply pins (continued) symbol i/o voltage i/o alternative function description sta8089fg table 2. main function pins symbol i/o voltage i/o alternative function description sta8089fg adc_in1 1.4 v ? 0 v typ range i default adc analog input [1] 32 adc_in2 1.4 v ? 0 v typ range i default adc analog input [2] 33 rstn 1.0 v i default reset input with schmitt-trigger characteristics and noise filter. 25 rtc_xti 1.4 v (max) i default input of the 32 khz oscillator amplifier circuit and input of the internal real time clock circuit. 27 rtc_xto 1.4 v (max) o default output of the oscillator amplifier circuit. 28 stdby_out 1.0 v o default when low, indicates the chip is in standby mode 23 stdbyn 1.0 v i default when low, the chip is forced in standby mode - all pins in high impedance except the ones powered by backup supply 24 wakeup 1.0 v i default wakeup from standby mode 26
pin description sta8089fg 10/17 docid025732 rev 2 2.5 test/emulated dedicated pins 2.6 communication interface pins table 3. test/emulated dedicated pins symbol i/o voltage i/o alternative function description sta8089fg tck vddio_r2 i default jtag test clock 56 tdi vddio_r2 i default jtag test data in / boot3 53 tdo vddio_r2 o default jtag test data out 50 tms vddio_r2 i default jtag test mode select / boot2 2 tp_if_n 1.2 v o default diff.test point for if ? neg. 6 tp_if_p 1.2 v o default diff.test point for if . pos. 5 trstn vddio_r2 i default jtag test circuit reset 3 table 4. communication interface pins symbol i/o voltage i/o alternative function function description sta8089fg can0_rx (1) vddio_r2 i af0 (default) can0_rx can0 receive data input 54 i af1 uart0_rx uart0 rx data iaf2 tsense external temperature capture port i/o af3 i2c_sd i2c serial data can0_tx (1) vddio_r2 o af0 (default) can0_tx can0 transmit data output 51 o af1 uart0_tx uart0 tx data i/o af2 gpio7 general purpose i/o #7 o af3 i2c_clk i2c clock can1_rx (1) vddio_r2 i/o af0 i2c sd i2c serial data 55 i/o af1 gpio9 general purpose i/o #9 i af2 (default) can1_rx can1 receive data input i af3 sqi_cen sqi flash chip enable can1_tx (1) vddio_r2 o af0 i2c_clk i2c clock 1 i/o af1 gpio8 general purpose i/o #8 o af2 (default) can1_tx can1 transmit data output o af3 spi_csn spi chip select active low
docid025732 rev 2 11/17 sta8089fg pin description 16 spi_clk vddio_r1 o af0 (default) spi_clk spi clock 41 i/o af1 gpio25 general purpose i/o #25 o af2 sqi_clk sqi flash clock o af3 mmc_clk multimedia clock line spi_csn vddio_r1 o af0 (default) spi_csn spi chip select active low// io_power sel ring 1 40 i/o af1 gpio24 general purpose i/o #24 i af2 sqi cen sqi flash chip enable i/o af3 mmc_cmd multimedia card command line spi_di vddio_r1 i af0 (default) spi_di spi serial data input 42 i/o af1 gpio26 general purpose i/o #26 i/o af2 sqi_sio0/si sqi flash data io 0 / ser. i i/o af3 mmc_d0 multimedia card data 0 spi_do vddio_r1 o af0 (default) spi_do spi serial data output 43 i/o af1 gpio27 general purpose i/o #27 i/o af2 sqi_sio1/so sqi flash data io 1 / ser. o i/o af3 mmc_d1 multimedia card data 1 uart0_rx vddio_r1 i af0 (default) uart0_rx uart0 rx data 38 i/o af1 gpio30 general purpose i/o #30 i/o af2 sqi_sio2 sqi flash data io 2 i af3 timer_icapa extended function timer - input capture a uart0_tx vddio_r1 o af0 (default) uart0_tx uart0 tx data / boot1 39 i/o af1 gpio31 general purpose i/o #31 i/o af2 sqi_sio3 sqi flash data io 3 o af3 timer_ocmpa extended function timer ? output compare a uart2_rx vddio_r1 i af0 (default) uart2_rx uart2 rx data 36 i/o af1 gpio28 general purpose i/o #28 i/o af2 i2c_sd i2c serial data i/o af3 mmc_d2 multimedia card data 2 table 4. communication interface pins (continued) symbol i/o voltage i/o alternative function function description sta8089fg
pin description sta8089fg 12/17 docid025732 rev 2 2.7 general purpose pins 2.8 rf front-end pins uart2_tx vddio_r1 o af0 (default) uart2_tx uart2 tx data / boot0 37 i/o af1 gpio29 general purpose i/o #29 o af2 i2c_clk i2c clock i/o af3 mmc_d3 multimedia card data 2 usb_dm vddio_r2 usb af0 (default) usb_dm usb d- signal 49 usb_dp vddio_r2 usb af0 (default) usb_dp usb d+ signal 48 1. only for sta8089fgb. table 4. communication interface pins (continued) symbol i/o voltage i/o alternative function function description sta8089fg table 5. general purpose pins symbol i/o voltage i/o alternative function function description sta8089fg gpio1 vddio_r1 i/o af0 (default) gpio1 general purpose i/o #1 35 i af1 mspin_sdata msp serial data input o af2 pps_out pulse per second output i af3 tsense external temperature capture port table 6. rf front-end pins symbol i/o voltage i/o alternative function description sta8089fg lna_in 1.2 v i default low noise amplifier input 9 xtal_in 1.2 v i default input side of crystal oscillator or tcxo input 19 xtal_out 1.2 v o default output side of crystal oscillator 20
docid025732 rev 2 13/17 sta8089fg package and packing information 16 3 package and packing information 3.1 ecopack ? packages in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. 3.2 vfqfpn56 7 x 7 x 0.85 mm package information table 7. vfqfpn56 package dimensions symbol min. typ. max common dimensions a 0.80 0.85 0.90 a1 0 0.01 0.05 a2 0.60 0.65 0.70 a3 0.20 ref b 0.15 0.20 0.25 d 7.00 bsc d1 6.75 bsc d2 5.0 5.1 5.2 e 7.00 bsc e1 6.75 bsc e2 5.0 5.1 5.2 e 0.40 bsc 0 12 l 0.30 0.40 0.50 n56 nd 14 ne 14 p 0.24 0.42 0.60 q 0.30 0.40 0.65 r 0.13 0.17 0.23
package and packing information sta8089fg 14/17 docid025732 rev 2 figure 4. vfqfpn56 7 x 7 x 0.85 mm package dimension ("1($'5
docid025732 rev 2 15/17 sta8089fg ordering information 16 4 ordering information figure 5. ordering information scheme packing qualified grade/can bus tr = tape and reel = tray b = industrial grade (with can) = industrial grade (no can) sal with stacked flash sta8089fg tr b example code: family identifier
revision history sta8089fg 16/17 docid025732 rev 2 5 revision history table 8. document revision history date revision changes 19-dec-2013 1 initial release. 31-jan-2014 2 updated features list updated following chapters: ? chapter 1: overview ? chapter 2: pin description ? chapter 3: package and packing information ? chapter 4: ordering information
docid025732 rev 2 17/17 sta8089fg 17 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a particular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. st products are not designed or authorized for use in: (a) safety critical applications such as life supporting, active implanted devices or systems with product functional safety requirements; (b) aeronautic applications; (c) automotive applications or environments, and/or (d) aerospace applications or environments. where st products are not designed for such use, the purchaser shall use products at purchaser?s sole risk, even if st has been informed in writing of such usage, unless a product is expressly designated by st as being intended for ?automotive, automotive safety or medical? industry domains according to st product design specifications. products formally escc, qml or jan qualified are deemed suitable for use in aerospace by the corresponding governmental agency. resale of st products with provisions different from the statem ents and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or register ed trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2014 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - swed en - switzerland - united kingdom - united states of america www.st.com


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